Question

3)
The group of bits 101001 is serially shifted (LSB first) into a 6-bit parallel output shift register
with an initial state 011110. After fifth clock pulses, the register contains
?
a. 011101
b. 000011
c. 001010
d.010010
​

Answer 1

Answer:

sorry for the inconveniences ok

Answer 2

Answer:

Consider that,

101001 → 0 1 1 1 1 0

Therefore, after 2 clock pulses,

Content in the register is,

1st clock pulse: 10100 → 1 0 1 1 1 1

2st clock pulse: 1010 → 0 1 0 1 1 1

3rd clock pulse: 101 → 0 0 1 0 1 1

4th clock pulse: 10 → 1 0 0 1 0 1

5th clock pulse: 1 → 0 1 0 0 1 0

After fifth clock pulses, the register contains is 010010

Therefore, the correct option is (d) 010010