A bus organized CPU has 8 register with 4 bits each, an ALU, and a destination decoder.
How many multiplexers are there in the A bus, and what is the size of each multiplexer?
How many selection inputs are needed for MUX A and MUX B?
How many inputs and outputs are there in the decoder?
Formulate the control word for the system assuming that the ALU has 35 operations.
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Answer:
1. 8*1
2. 3
3. 3*8
4. 6
Explanation:
no explanation
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