Question

) A common bus system which is capable of transferring 4 bits at time with number of registers
are 4 and each register is of 4 bits? Draw circuit diagram using Tri state buffer with proper
labelling and explain its working ?

Answer 1

Answer:

tanong mo sa teacher mo.

Answer 2

A common bus system that is capable of transferring 4 bits at a time with a number of registers  are 4 and each register is of 4 bits.

Explanation:

The input logic circuit in diagrammatic representation has three inputs, I0, I1, and T, and three outputs, S0, S1 and L.

variables S0 and S1 select one of the source addresses for CAR.

Variable L enables the load input in SBR.

The binary values of the two selection variables determine the path in the multiplexer.

For example, with S1 S0 = 10, multiplexer input number 2 is selected and establishes a transfer.