Question

a) In order to communicate between devices inside a computer. A wire routing scheme is needed such that all the devices remains connected without wasting much wires and the scheme must be scalable to add new devices with ease. Connect the devices mentioned in the diagram, using a single bus controller. (2 marks)
Rubrics (Scoring Guide)
- Neat Diagram = 40%
- Proper connections with labels = 60%
b) Machine cycle defines a loop process with four major components. Explain why machine cycle is important? If the components of machine cycle are inter-swapped, would that cause any problems? Can we add another module to rectify the problem caused by inter-swapping? (2 marks)
Rubrics (Scoring Guide)
- Explanation = 50%
- Diagram = 50%
c) Cache memory and RAM both are based on transistor based then why cache memory is needed if we already have RAM (Random Access Memory) as a volatile memory? Is it possible to deploy any one type of memory in computer for all purposes? (1 mark)

Rubrics (Scoring Guide)
- Reasoning = 100%

Answer 1

Answer:

Explanation:

a. Explanation:

Buses: I/O will be connected to Processor and Memory using Bus.

A bus is a shared communication link.

It uses one set of wires to connect multiple subsystems.

Computer Engineering homework question answer, step 1, image 1

According to the situation, two ways are there how a bus can be used

Sometimes shared bus with memory.

Sometimes a separate I/O bus.

Advantages

Versatility:

• New devices can be added easily
• Peripherals can be moved between computer
• Systems that use the same bus standard
• Low Cost: A single set of wires is shared in multiple ways

Disadvantages

• It creates a communication bottleneck
• The bandwidth of that bus can limit the maximum I/O throughput
• The maximum bus speed is largely limited by:
• The length of the bus
• The number of devices on the bus
• The need to support a range of devices with:
• Widely varying latencies
• Widely varying data transfer rates
• Synchronous and Asynchronous Bus
• Synchronous Bus:

• Includes a clock in the control lines
• A fixed protocol for communication that is relative to the clock
• Advantage:
• It involves very little logic and can run very fast
• Disadvantages:
• Every device on the bus must run at the same clock rate
• To avoid clock skew, they cannot be long if they are fast

Asynchronous Bus:

• It is not clocked
• It can accommodate a wide range of devices
• It can be lengthened without worrying about clock skew
• It requires a handshaking protocol

b.

Machine Cycle:

• Machine cycle is also known as the processor cycle.
• The central processing unit(cpu) is the main component for the execution of the machine cycle.
• The machine cycle is considered a sequence of four different processor  that runs in a repetitive manner for the execution  of an instruction.

Components of machine cycle:

(i)Fetch

• In the first process fetch , the control unit asks in main memory for the first instruction for executing which is store in the memory as some specific address which can easily identified by a program counter(Control unit).

(ii)Decode

• After getting the instruction the next step is to decode the incoming instruction. The CPU contains the control unit which is used for decoding the instruction in  the instruction register. The register is the small component of memory that performs the operation and speed up the component of memory of CPU.

(iii)Execute

• After that , the instruction is executed by the computer processor . The program counter is used for tracking the instruction sequence and track the instruction address as the instruction is executed and the next instruction in the queue for the execution .

(iv)Store

• As the execution of an instruction is completed the output is stored in the memory for later use so that if there is a requirement then the result can be fetched easily.

c. Explanation:

• Cache memory and RAM both are transistor-based memory but Cache is needed as it is faster compared to RAM.
• The main reason behind this is the access time and spatial and temporal locality deployed by cache memory.
• The access time for a cache memory is very less than the Random Access Memory (RAM)
• Whenever any word is searched it is first looked in the Cache and since the size of cache is less as compared to RAM the time taken for transferring the required word is less compared to main memory (RAM).
• Suppose if there is a miss in the cache the control is transferred to main memory and the word is looked into the memory, thus taking the longer time to transfer the required word.
• Suppose there are the following parameters in a computer system:
• Cache access time = c unit.
• Cache hit ratio =x
• main memory access time =m unit.
• Therefore the Effective access time $=x*c+(1-x)*(c+m)$
• In brief, because Cache access time is lower than the RAM (main memory) access time, so cache memory is needed even we have RAM.
• Yes, it is possible to deploy only RAM in computer for all purposes but the efficiency will be very less, even small computations will take very long time.