Computer Science, asked by pasana4377, 1 year ago

A set-associative cache has a block size of four 16-bit words and a set size of 2. The cache can accommodate a total of 4096 words. The main memory size that is cacheable is 64k 32 bits. Design the cache structure and show how the processors addresses are interpreted.

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Answered by Anonymous
12

Explanation:

set-associative cache has a block size of four 16-bit words and a set size of 2. The cache can accommodate a total of 4096 words. The main memory size that is cacheable is 64k 32 bits. Design the cache structure and show how the processors addresses

Answered by Anonymous
1

Explanation:

set associative cache able design catch structure show how processor addresses interrupt

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