Computer Science, asked by mdmostafizurrahmanfo, 6 months ago

A set- associative cache has a block size of four 16-bit words and a set size of 2. The cache can accommodate a total of 4096 words. The main memory size that is cacheable is 64K * 32 bits. Design the cache structure and show how the processor’s addresses are interpreted

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Answered by tarun679

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question is wrong.........!!!!

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