Computer Science, asked by kunal2484, 11 months ago

An 8-bit serial in/serial out shift register is used with a clock frequency of 100 khzwhat is the time delay between the serial input and the q5 output?

Answers

Answered by shubhamjoshi033
2

Time delay between input and q5 output will be 60μs.

Explanation :

Since Frequency = 100 khz

Hence

Time period of 1 cycle = 1/100khz

= 10 μs

Now between the input(q0) and the q5 output a total of 6 bit shifting takes place

Hence

time delay = 6 time period

= 6 x 10μs

= 60μs

Hence time delay between input and q5 output will be 60μs.

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