An 8-bit serial in/serial out shift register is used with a clock frequency of 100 khzwhat is the time delay between the serial input and the q5 output?
Answers
Answered by
2
Time delay between input and q5 output will be 60μs.
Explanation :
Since Frequency = 100 khz
Hence
Time period of 1 cycle = 1/100khz
= 10 μs
Now between the input(q0) and the q5 output a total of 6 bit shifting takes place
Hence
time delay = 6 time period
= 6 x 10μs
= 60μs
Hence time delay between input and q5 output will be 60μs.
Similar questions
Computer Science,
7 months ago
English,
7 months ago
Math,
7 months ago
Accountancy,
1 year ago
Math,
1 year ago
English,
1 year ago
Social Sciences,
1 year ago