Computer Science, asked by Mdarif343, 9 months ago

An instruction pipeline was designed with five stages. Individually each of the stages will take 3.2 ns, 2.9ns, 4.1ns, 3.3ns and 3.5ns, respectively. The pipeline latch latency is 0.4ns. What is the minimum cycle time of the pipeline?

Answers

Answered by aharshit947
0

Answer: 4.5 ns

Explanation: confirmed by NPTEL

Answered by krishnaanandsynergy
0

The minimum cycle time of the pipeline is 4.5 ns.

Explanation:

Given:-

Time taken by different stages = 3.2ns, 2.9ns, 4.1ns, 3.3ns, 3.5ns

Pipeline latch latency = 0.4ns

To find:-

 cycle time            

cycle time = maximum of all stages + pipeline latch latency

                 = 4.1 + 0.4

                = 4.5 ns                

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