b) Discuss how data path works in IJVM.
Answers
IJVM Datapath Notes:-
These notes elaborates Figure 4-1 "The datapath of the example micro-architecture used in this chapter" on page 205 of our text.
3 types of datapath components: registers, ALU, and shifter.
Registers
All registers are 32 bits wide. The registers mean:
SP - stack pointer
LV - frame pointer
CPP - constant pool pointer
TOS - used to hold the value at the top of the stack
OPC - scratch register for intermediate values, no strict designated use
H - holding register for ALU A input
MAR - memory address register, holds address of memory reference
MDR - memory data register, holds data value read from or written to memory
PC - program counter, memory address of next instruction to execute
MBR - memory data register B, holds data value at PC memory location
Most register values can be loaded (read) onto the B bus, and changed/written from the C bus value. Some exceptions are:
MBR can only be written from memory
MDR can be written from memory or bus C
MAR, MDR, and PC values are used by memory
MAR register is not connected to B bus
MBR uses only 1 byte (of 4), holds 1 byte opcode
ALU
ALU is as shown in Figure 3-19 on page 138. This one bit slice is replicated 32 times to handle our 32 bit quantities. 2's complement is used for negative numbers. Each slice has 2 function inputs, F0 and F1:
F0 F1 Function
0 0 A and B
0 1 A or B
1 0 not B
1 1 A + B
The datapath ALU has 6 control inputs: F0, F1 (as above) and 4 others:
ENA - enable A input, or use 0 if false
ENB - enable B input, or use 0 if false
INVA - invert A input, or just use A if false
INC - increment ALU result if true by forced carry into lowest bit
See Fig 4-2 for sample list of "useful" 6 bit control combinations.
Shifter
2 control bits:
SLL8, "Shift left logical 8 bits" - shift left 8 bits, filling least significant bits with 0's
SRA1, "Shift right arithmetic 1 bit" - shift right 1 bit, leave most significant bit unchanged... m
Answer:
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Explanation:
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