Characteristics of von Neumann architecture?
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that uses a central processing unit (CPU) and a single separate storage structure (memory) to hold both instructions and data. Characteristicsof the Von Neumann's architecture: a) memory; b) control unit; c) arithmetic logic unit; d) input / output interface.
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Hi there!
Here's the answer:
•°•°•°•°•°<><><<><>><><>•°•°•°•°•°
¶¶¶ Von-neumann Architecture ¶¶¶
- It is alse called as 'Princeton Architecture'.
*** Block diagram of Von-Neumann Architecture is shown in attachment.
•°•°•°•°•°<><><<><>><><>•°•°•°•°•°
• In Von-neumann Architecture, Single Bus is shared for fetching both Data and Instructions.
Eg: ARM7, Pentium
• The cost is low.
[ Requires less wires/ Less Hard wiring Connection ]
• Throughput(Speed) is less.
[ As parallel fetching of Instruction & Data can't be possible
^ Due to single bus, first instructions are fetched, then data are fetched. ]
• Due to Single Memory block for both Instructions & Data:
- There is a chance of Program Memory Corruption
- There may be Memory Alignment Problems
- Self Modifying Codes are available.
•°•°•°•°•°<><><<><>><><>•°•°•°•°•°
©#£€®$
:)
Hope it helps
Here's the answer:
•°•°•°•°•°<><><<><>><><>•°•°•°•°•°
¶¶¶ Von-neumann Architecture ¶¶¶
- It is alse called as 'Princeton Architecture'.
*** Block diagram of Von-Neumann Architecture is shown in attachment.
•°•°•°•°•°<><><<><>><><>•°•°•°•°•°
• In Von-neumann Architecture, Single Bus is shared for fetching both Data and Instructions.
Eg: ARM7, Pentium
• The cost is low.
[ Requires less wires/ Less Hard wiring Connection ]
• Throughput(Speed) is less.
[ As parallel fetching of Instruction & Data can't be possible
^ Due to single bus, first instructions are fetched, then data are fetched. ]
• Due to Single Memory block for both Instructions & Data:
- There is a chance of Program Memory Corruption
- There may be Memory Alignment Problems
- Self Modifying Codes are available.
•°•°•°•°•°<><><<><>><><>•°•°•°•°•°
©#£€®$
:)
Hope it helps
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