Classify the microprocessor based on the size of the data.
Answers
RISC Processor
RISC stands for Reduced Instruction Set Computer. It is designed to reduce the execution time by simplifying the instruction set of the computer. Using RISC processors, each instruction requires only one clock cycle to execute results in uniform execution time. This reduces the efficiency as there are more lines of code, hence more RAM is needed to store the instructions. The compiler also has to work more to convert high-level language instructions into machine code.
Some of the RISC processors are −
Power PC: 601, 604, 615, 620
DEC Alpha: 210642, 211066, 21068, 21164
MIPS: TS (R10000) RISC Processor
PA-RISC: HP 7100LC
Architecture of RISC
RISC microprocessor architecture uses highly-optimized set of instructions. It is used in portable devices like Apple iPod due to its power efficiency.

Characteristics of RISC
The major characteristics of a RISC processor are as follows −
It consists of simple instructions.
It supports various data-type formats.
It utilizes simple addressing modes and fixed length instructions for pipelining.
It supports register to use in any context.
One cycle execution time.
“LOAD” and “STORE” instructions are used to access the memory location.
It consists of larger number of registers.
It consists of less number of transistors.
CISC Processor
CISC stands for Complex Instruction Set Computer. It is designed to minimize the number of instructions per program, ignoring the number of cycles per instruction. The emphasis is on building complex instructions directly into the hardware.
The compiler has to do very little work to translate a high-level language into assembly level language/machine code because the length of the code is relatively short, so very little RAM is required to store the instructions.
Some of the CISC Processors are −
IBM 370/168
VAX 11/780
Intel 80486
Architecture of CISC
Its architecture is designed to decrease the memory cost because more storage is needed in larger programs resulting in higher memory cost. To resolve this, the number of instructions per program can be reduced by embedding the number of operations in a single instruction.