Consider a family of logic gates that operates under the static discipline with the following voltage thresholds: VIL = VOL =0.5 V and VIH= VOH = 4.4 V a. Calculate the noise margins.
Answers
Answer:
Explanation:
When answering the questions below, assume that all voltages are constrained to be in the range 0V to 5V.
Can one chose a VOL of 0V for this device? Explain.
No, since the static discipline requires that VOUT <= VOL for a valid "0" output and VOUT for this device never falls below 0.5V.
What's the smallest VOL one can choose and still have the device obey the static discipline? Explain.
The smallest VOL one can choose is 0.5V, the lowest output voltage produced by the device.
Assuming that we want to have 0.5V noise margins for both "0" and "1" values, what are appropriate voltage levels for VOL, VIL, VIH, and VOH so that the device obeys the static discipline. Hint: there are many possible choices, just choose one that obeys the constraints listed above.
Here are the rules of operation imposed on us by the static discipline:
VIN >= VIH implies VOUT <= VOL
VIN <= VIL implies VOUT >= VOH
VOL + noise margin = VIL
VOH - noise margin = VIH
So if VOL = 0.5V and assuming 0.5V noise margins, then
applying rule 3: VIL = 1V
applying rule 2 and looking at the VTC: VOH = 4V
applying rule 4: VIH = 3.5V
and finally we can check that rule 1 is obeyed by these choices.
Assuming that we want to have 0.5V noise margins for both "0" and "1" values, what is the largest possible voltage level for VOL that still results in a device that obeys the static discipline?
To determine our maximum VOL, let's set it equal to N. Then
VIL = N + 0.5V
which is simply the noise margin added to VOL. If we let M be the size of the forbidden region in volts,
VIH = VIL + M = N + 0.5 + M.
Finally,
VOH = VIH + 0.5 = N + M + 1.
We'll use the function VTC(v) as the name of the function represented graphically by the voltage transfer characteristic. So, we want to find N and M such that VOH = VTC(VIL) and VOL = VTC(VIH). If we assume that VIL and VIH lie in the range [1,2.5] (we'll check that assumption in a minute) then
VOH = VTC(VIL) implies N + M + 1 = VTC(N + 0.5) = 6 - 2*(N + 0.5)
VOL = VTC(VIH) implies N = VTC(N + 0.5 + M) = 6 - 2*(N + M + 0.5)
Solving the two equations we get N =1 and M = 1 giving us VOL = 1, VIL = 1.5, VIH = 2.5, VOH = 3. VIL and VIH lie in the range we assumed above, so we're all set.
Assuming that we want to have equal noise margins for both "0" and "1" values, what is the largest noise margin we can achieve with this device and still obey the static discipline?
It's clear that to maximize our noise margins, VOL should be as small as possible and VOH should be as large as possible. By inspecting the VTC we see that VOL = 0.5V is the best we can do. From earlier parts we know we can achieve a noise margin N of at least 0.5V.
We can use the following construction to figure out the largest noise margin N. Consider two of these devices hooked in series:
The letters "A" through "E" mark points of interest where we'll want to determine the voltage. Assume we apply 0.5V at point "A". Then:
at point "B", the largest voltage we'll measure is 0.5 + N, i.e., the voltage we applied to the other end of the wire and the worst-case noise perturbation.
referring to the VTC, with 0.5+N on the input we'll measure a voltage of 4 - 2(N + .5 - 1) = 5 - 2N at the output (point "C").
at point "D", the smallest voltage we'll measure is 5 - 3N, i.e., the voltage we applied to the other end of the wire and the worst-case noise perturbation.
finally at point "E" we'd want to measure 0.5V, i.e., a valid "0" voltage level.
In order to get 0.5V at point "E", the VTC tells us that the input voltage (voltage at "D") must be greater than or equal to 3V. So 5 - 3N >= 3 which we achieve if N <= 2/3.