Question

Consider a two-level cache hierarchy with l1 and l2 caches. An application incurs 1.4 memory accesses per instruction on average. For this application, the miss rate of l1 cache is 0.1; the l2 cache experiences, on average, 7 misses per 1000 instructions. The miss rate of l2 expressed correct to two decimal places is

Answer 1

Explanation:

hope it helps

plz mrk it as brainliest