Computer Science, asked by deepthibheesetty, 1 day ago

) CPU request the following Block addresses (x+11), (x+21) and (x+17). There are 16 one-word blocks in cache. Design and Show the memory mapping for the following cache configurations. I. Direct mapped. II. 4-way ,8-way and 16- way set associative mapped. (use LRU replacement policy) * Where X= 66

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Answered by chandrashekar1564
0

Answer:

iam a grwate computer ok na

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