Design Modulo - 10 Repel Counter using SR Flip Flop ?
Answers
Original question : How do I design a mod-10 binary up counter using sr flip-flops?
mod-10 or decade counter can be realized either as an asynchronous mod-10 counter or synchronous mod-10 counter. To design that we should be aware with the following terms:
Flip-flop truth table and excitation table .
Difference between Asynchronous counter and synchronous counter.
Mode - N counter formula. here n are number of flip-flop required to implement the N no. Of stater. Where N= 2^n
Here I'm using the JK flip-flop to design the mod-10 synchronous up counter ,which will count from 0000 to 1001.
We have number of state N = 10(from 0 to 9) and for that minimum number of flip-flop required are 4.
Now to design a mod-10 counter we will go through following steps
Calculate the present state and next state truth table.
Use the SR flip flops excitation table to find the value of S and R using the present value(Qn) and next value(Qn+1). Here I have use the JK flip-flop. (shown in below figure1–2)
Now find the mathematical equation using the K-map. (refer figure -3)
Realize the above equation using flip-flop.
In the following figure QA, QB etc terms shows the present state of the respective filp flops while QA+1 , QB+1 represent the next
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