Difference between field programmable logic devices and fpga
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DIFFERENCE BETWEEN FPGA AND CPLD
FPGA-Field Programmable Gate Array and CPLD-Complex Programmable Logic Device--
both are programmable logic devices made by the same companies with different
characteristics.
· "A Complex Programmable Logic Device (CPLD) is a Programmable Logic Device
with complexity between that of PALs (Programmable Array Logic) and FPGAs, and
architectural features of both. The building block of a CPLD is the macro cell, which
contains logic implementing disjunctive normal form expressions and more specialized logic
operations".
· This is what Wiki defines.....!!
· Click here to see what else wiki has to say about it !
Architecture
· Granularity is the biggest difference between CPLD and FPGA.
· FPGA are "fine-grain" devices. That means that they contain hundreds of (up to
100000) of tiny blocks (called as LUT or CLBs etc) of logic with flip-flops, combinational
logic and memories.FPGAs offer much higher complexity, up to 150,000 flip-flops and large
number of gates available.
· CPLDs typically have the equivalent of thousands of logic gates, allowing
implementation of moderately complicated data processing devices. PALs typically have a
few hundred gate equivalents at most, while FPGAs typically range from tens of thousands
to several million.
· CPLD are "coarse-grain" devices. They contain relatively few (a few 100's max)
large blocks of logic with flip-flops and combinational logic. CPLDs based on AND-OR
structure.
· CPLD's have a register with associated logic (AND/OR matrix). CPLD's are mostly
implemented in control applications and FPGA's in datapath applications. Because of this
course grained architecture, the timing is very fixed in CPLDs.
· FPGA are RAM based. They need to be "downloaded" (configured) at each power-
up. CPLD are EEPROM based. They are active at power-up i.e. as long as they've been
programmed at least once.
· FPGA needs boot ROM but CPLD does not. In some systems you might not have
enough time to boot up FPGA then you need CPLD+FPGA.
· Generally, the CPLD devices are not volatile, because they contain flash or erasable
ROM memory in all the cases. The FPGA are volatile in many cases and hence they need
FPGA-Field Programmable Gate Array and CPLD-Complex Programmable Logic Device--
both are programmable logic devices made by the same companies with different
characteristics.
· "A Complex Programmable Logic Device (CPLD) is a Programmable Logic Device
with complexity between that of PALs (Programmable Array Logic) and FPGAs, and
architectural features of both. The building block of a CPLD is the macro cell, which
contains logic implementing disjunctive normal form expressions and more specialized logic
operations".
· This is what Wiki defines.....!!
· Click here to see what else wiki has to say about it !
Architecture
· Granularity is the biggest difference between CPLD and FPGA.
· FPGA are "fine-grain" devices. That means that they contain hundreds of (up to
100000) of tiny blocks (called as LUT or CLBs etc) of logic with flip-flops, combinational
logic and memories.FPGAs offer much higher complexity, up to 150,000 flip-flops and large
number of gates available.
· CPLDs typically have the equivalent of thousands of logic gates, allowing
implementation of moderately complicated data processing devices. PALs typically have a
few hundred gate equivalents at most, while FPGAs typically range from tens of thousands
to several million.
· CPLD are "coarse-grain" devices. They contain relatively few (a few 100's max)
large blocks of logic with flip-flops and combinational logic. CPLDs based on AND-OR
structure.
· CPLD's have a register with associated logic (AND/OR matrix). CPLD's are mostly
implemented in control applications and FPGA's in datapath applications. Because of this
course grained architecture, the timing is very fixed in CPLDs.
· FPGA are RAM based. They need to be "downloaded" (configured) at each power-
up. CPLD are EEPROM based. They are active at power-up i.e. as long as they've been
programmed at least once.
· FPGA needs boot ROM but CPLD does not. In some systems you might not have
enough time to boot up FPGA then you need CPLD+FPGA.
· Generally, the CPLD devices are not volatile, because they contain flash or erasable
ROM memory in all the cases. The FPGA are volatile in many cases and hence they need
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