Discuss the interrupt structure of 8085 for 5marks
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These interrupts are either edge-triggered or level-triggered, so they can be disabled. INTR, RST 7.5, RST 6.5, RST 5.5 are maskable interrupts in 8085 microprocessor. ... TRAP is a non-maskable interrupt. It consists of both level as well as edge triggering and is used in critical power failure conditions.
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