Draw the basic circuit diagram of sweep generator used for synchronization and explain the working of it with waveforms
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The circuit diagram of a transistor sweep generator is shown in the figure. The performance of the circuit can be explained as follows.
During the positive half cycle of the input signal the base-emitter junction of the transistor becomes forward biased. The transistor
conducts and is driven into saturation. Then the output voltage will be low. During the negative half cycle the base-emitter junction
becomes reverse biased and the transistor is driven into cut-off. During this interval the collector of the transistor will be at a
voltage slightly less than VCC. The capacitor now charges towards this high voltage. During the next positive half cycle the transistor
turns ON and provides the discharge path for the capacitor. The capacitor discharges during the short time interval.
Thus during the positive half cycle the output of the circuit will be low and during the next half cycle we obtain the sweep wave in
the output. Hence the name sweep generator for the circuit.
Procedure
EDWin 2000 -> Schematic Editor: The circuit diagram is drawn by loading components from the library. Wiring and proper net assignment
has been made. Values are assigned for relevant components
During the positive half cycle of the input signal the base-emitter junction of the transistor becomes forward biased. The transistor
conducts and is driven into saturation. Then the output voltage will be low. During the negative half cycle the base-emitter junction
becomes reverse biased and the transistor is driven into cut-off. During this interval the collector of the transistor will be at a
voltage slightly less than VCC. The capacitor now charges towards this high voltage. During the next positive half cycle the transistor
turns ON and provides the discharge path for the capacitor. The capacitor discharges during the short time interval.
Thus during the positive half cycle the output of the circuit will be low and during the next half cycle we obtain the sweep wave in
the output. Hence the name sweep generator for the circuit.
Procedure
EDWin 2000 -> Schematic Editor: The circuit diagram is drawn by loading components from the library. Wiring and proper net assignment
has been made. Values are assigned for relevant components
Attachments:
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