E=(x+y+z+P). Thus, the XNOR is sometimes referred to as the even function and XOR is also sometimes referred to as odd function. In case that our truth table was modified such that our output is true whenever there is an odd number of 1s, the resulting function will be an XOR, and the K-map will have the checkerboard pattern. However, the first 1 will be in cell 0001 instead of 0000.
Write the boolean function above as structural representation in verilog
Test the functionality on the FPGA. Add your comments.
Show your codes, simulation and testing cases in FPGA in your report.
How could you change the circuit that you implemented above to simulate a communication system where a single bit error may be introduced to one of the four inputs to the parity detector?
How could the odd parity detector that you used in this task be modified to create an Even Parity detector?
Answers
Explanation:
Basically the “Exclusive-NOR” gate is a combination of the Exclusive-OR gate and the NOT gate but has a truth table similar to the standard NOR gate in that it has an output that is normally at logic level “1” and goes “LOW” to logic level “0” when ANY of its inputs are at logic level “1”.
ADVERTISING
However, an output “1” is only obtained if BOTH of its inputs are at the same logic level, either binary “1” or “0”. For example, “00” or “11”. This input combination would then give us the Boolean expression of: Q = (A ⊕ B) = A.B + A.B
Then the output of a digital logic Exclusive-NOR gate ONLY goes “HIGH” when its two input terminals, A and B are at the “SAME” logic level which can be either at a logic level “1” or at a logic level “0”. In other words, an even number of logic “1’s” on its inputs gives a logic “1” at the output, otherwise is at logic level “0”.
Then this type of gate gives and output “1” when its inputs are “logically equal” or “equivalent” to each other, which is why an Exclusive-NOR gate is sometimes called an Equivalence Gate.
The logic symbol for an Exclusive-NOR gate is simply an Exclusive-OR gate with a circle or “inversion bubble”, ( ο ) at its output to represent the NOT function. Then the Logic Exclusive-NOR Gate is the reverse or “Complementary” form of the Exclusive-OR gate, (A ⊕ B) we have seen previously.
Ex-NOR Gate Equivalent
exclusive-nor gate
The Exclusive-NOR Gate, also written as: “Ex-NOR” or “XNOR”, function is achieved by combining