Computer Science, asked by praneet1025, 1 month ago

Examine the difficulty of adding a proposed lwi.d rd, rs1, rs2 ("Load With Increment") instruction to
3 of 4
RISC-V.
Interpretation: Reg[rd]=Mem[Reg[rs1]+Reg[rs2]]
a. Which new functional blocks (if any) do we need for this instruction?
b. Which existing functional blocks (if any) require modification?
c. Which new data paths (if any) do we need for this instruction?
d. What new signals do we need (if any) from the control unit to support this instruction?

Answers

Answered by narutokakashi
0

Answer:

2c3c3f3f3f3f3f3f3kukiokkkkkkk

Similar questions