Explain.me this one
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Check the attachment for the answer :
Here,
G1- NOT Gate
G2- NOT Gate
G3- NOR Gate
The o/p of the gates are as shown in figure.
The ans is NAND gate.
It is equivalent to implementing NAND using NOR gate.
;)
hope it helps
Comment if you need to clear something.
Here,
G1- NOT Gate
G2- NOT Gate
G3- NOR Gate
The o/p of the gates are as shown in figure.
The ans is NAND gate.
It is equivalent to implementing NAND using NOR gate.
;)
hope it helps
Comment if you need to clear something.
Attachments:
NasheeraG:
Y ?
seen ur status !
Ohh just divided our class
into aiims
:)
ohh !
even though u r in right
:)
:)
what are u doing ?
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