explain NAND gate functioning?
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Nand gate is using an and gate and negating the output.
The result will be (a.b)compliment
The result will be (a.b)compliment
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Please see diagram.
See the two input NAND gate. The truth table gives the value of the output line for various data values on the input digital lines.
Output of NAND gate will be high (or 1) when any of the input data lines is equal to 0 (low). When all the input lines are held high (1) then its output is low (0). It can be treated as a AND gate followed by an inverter gate.
_____
C = A * B
A B - C
0 0 - 1
1 0 - 1
0 1 - 1
1 1 - 0
Four input nand gate
___________
E = A * B * C * D
A B C D - E
1 1 1 1 - 0
0 0 0 0 - 1
0 0 1 0 - 1
all other combinations will give E = 1.
See the two input NAND gate. The truth table gives the value of the output line for various data values on the input digital lines.
Output of NAND gate will be high (or 1) when any of the input data lines is equal to 0 (low). When all the input lines are held high (1) then its output is low (0). It can be treated as a AND gate followed by an inverter gate.
_____
C = A * B
A B - C
0 0 - 1
1 0 - 1
0 1 - 1
1 1 - 0
Four input nand gate
___________
E = A * B * C * D
A B C D - E
1 1 1 1 - 0
0 0 0 0 - 1
0 0 1 0 - 1
all other combinations will give E = 1.
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