Explain the vector processor architecture and discuss the factors on which the exectuion time depends on?
Answers
• Work on linear arrays of numbers(vectors)
• Each iteration of a loop becomes one element of the vector
• Overcoming limitations of ILP:
– Dramatic reduction in fetch and decode bandwidth.
– No data hazard between elements of the same vector.
– Data hazard logic is required only between two vector
instructions
– Heavily interleaved memory banks. Hence latency of
initiating memory access versus cache access is amortized.
– Since loops are reduced to vector instructions, there are
no control hazards
– Good performance for poor locality
Work on linear arrays of numbers(vectors)
1) Each iteration of a loop becomes one element of the vector
2) Overcoming limitations of ILP:
3) Dramatic reduction in fetch and decode bandwidth.
4) No data hazard between elements of the same vector.
5) Data hazard logic is required only between two vector
instructions
6) Heavily interleaved memory banks. Hence latency of
initiating memory access versus cache access is amortized.
7) Sinceit loops are reduced to vector instructions, there are
no control hazards
8) Good performance for poor locality
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