Flip-flops are the sequential logic circuits which unlike the combinational circuits have the capability to store their previous state. Due to their storage ability, these flip-flops are used as the basic building blocks in the design of memory elements such as registers. To work as a memory unit, multiple flip-flops are connected together in a specific arrangement. Two of the most common flip-flop arrangements are Master-Slave Flip-flop Pairs and Pulse-Triggered Flip-flops.
If you want to design the memory unit for an embedded microprocessor, which of the two flip-flop arrangements would you chose in this situation to ensure high performance?
Give your opinion as brief and precise as possible.
Answers
ʜɪɢʜ ᴘᴇʀғᴏʀᴍᴀɴᴄᴇ ғʟɪᴘ ғʟᴏᴘs ᴀʀᴇ ᴇssᴇɴᴛɪᴀʟ ᴋᴇʏ ᴇʟᴇᴍᴇɴᴛs ɪɴ ᴛʜᴇ ᴅᴇsɪɢɴ ᴏғ ʜɪɢʜ-sᴘᴇᴇᴅ
integrated circuits. In all types of digital circuits design, the basic elements are Flip-Flops (FFs)
which are used extensively nowadays. In recent, Pulse triggered-FF (P-FF) has been considered a popular alternative to the conventional master slave based FF in the application of high speed
operations. As I have studied, I would like to use Pulse triggered flip-flop to design the memory
unit for an embedded microprocessor, because they have been widely used in microprocessors in
recent years due to their high performance.
ʙᴇ ʏᴏᴜʀs.............^_^
Master-Slave flip-flops have become obsolete and are being replaced by edgetriggered flip-flops. now a days the D flip flops are used in microprocessors.
they are widely used. the D flip flop are used to dtore memory data. they are efficient in processing.
when the signal high in Master-Slave Flip flop case the date will be store.
on the other hand in edge triggered response in the signal change from low to high or from high to low these are clock.and master slave are level triggering flip flops.
ʙᴇ sᴍᴀʀᴛ................^_^