Question

For an RC switch model, with the on –resistance of each device as R and the intermediate load capacitance is C, the delay is then defined as

 0.69 (R/2) C

 0.69 RC

 1.38 RC

 1.38 RC/2

1 point

The propagation delay is a ______ function of fan-in

 Linear

 Parabolic

 Quadratic

 No Relation

1 point

For an optimised 3-input NAND logic, if the gate size for the three NMOS are M1, M2 and M3, where M1 and M3 are the transistor closet to the ground terminal and power supply respective, then the optimised delay condition is given as 

 M1> M2> M3

 M1> M2 = M3

 M1< M2< M3

 M1> M2 = M3

1 point

For a 2-input NOR logic, the transition probability for zero to one transition assuming equal probability of 0 and 1 is given as 

 5/16

 3/16

 7/32

 5/32

1 point

For reduced dynamic power dissipation, in a series network, it is recommended to _____ the highest transition input in the network

 Put Early

 Delay

 Does not affect

 Delete

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Answer 1

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