Given 8 registers construct a bus using 224 decoder and 3 state buffer.
Answers
Three-State Bus Buffers
Last Updated: 25-03-2020
Usually any logic circuit has 2 states, i.e., in binary form (0 and 1). The buffer exhibits three states. It has 3 pins which include:
Input – accepts 1 or 0 (0 – disable and 1 – enable)
Output – if 3-state control is 0 then output follows input(according to the input 0 and 1).
Definition:
A three state bus buffer is an integrated circuit that connects multiple data sources to a single bus. The open drivers can be selected to be either a logical high, a logical low, or high impedance which allows other buffers to drive the bus.
Now, let’s see the more detailed analysis of a 3-state bus buffer in points:
As in a conventional gate, 1 and 0 are two states.
Third state is a high impedance state.
The third state behaves like an open circuit.
If the output is not connected, than there is no logical significance.
It may perform ant type of conventional logic operations such as AND, OR, NAND, etc.