Question

(i)
Instruction F D E W
I 1 1 2 1 1
I 2 1 2 2 1
I 3 2 1 3 2
I 4 1 3 2 1
I 5 1 2 1 3
An instruction pipeline consists of 4 stages: Fetch (F), Decode (D), Execute (E) and Write-result (W). The 5 instructions in a certain instruction sequence need
these stages for the different number of clock cycles as shown by the table above.
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Answer 1

Answer:

An instruction pipeline consists of 4 stages: Fetch (F), Decode (D), Execute (E) and Write-result (W). The 5 instructions in a certain instruction sequence need

these stages for the different number of clock cycles as shown by the table above