Interrupts provide a mechanism for creating multitasking applications: that is applications which, apparently, perform more than one task at a time using a single processor. The following diagram illustrates the interrupt signals and the CPU execution states corresponding to the interrupt signals. Consider the sequence and time of occurring of different interrupts, and construct a priority-time diagram according to the priority levels given in the table below.

Interrupt Signal #
Priority Level
1
1
2
4
3
3
4
2
Notes:
- Priority 1 = Highest | Priority 4 = Lowest
- Show main signal as well
- Label priority levels and ISR numbers on your diagram.
- All ISRs are of the same time duration and 3 times the duration of the interrupt signal
- The time between interrupts 3 & 4 is 3 times of the time between the interrupts 2 & 3
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