Output will be low for any case when one or more inputs are zero in which gate
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The truth table for a NAND gate is as one might expect, exactly opposite as that of an AND gate: As with AND gates, NAND gates are made with more than two inputs. In such cases, the same general principle applies: the output will be “low” (0) if and only if all inputs are “high” (1).
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Explanation:The truth table for a NAND gate is as one might expect, exactly opposite as that of an AND gate: As with AND gates, NAND gates are made with more than two inputs. In such cases, the same general principle applies: the output will be “low” (0) if and only if all inputs are “high”
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