Question

Q.4 Draw the logic diagram to implement the following expression with minimum number of
NAND gates.
(A+B'+C')'

Answer 1

Answer:

Consider the attachment.

Explanation:

• Draw it using AND, OR, NOR gates.
• Since NAND is a universal gate replace AND, OR and NOR with the combination of NAND.

Let's marks the NAND gate into the diagram for the sake of making explanation easy,

Gate 1 gets A' and B as input, and the output it returns is (A'.B)' = (A+B')

Gate 2 get (A+B') and (A+B') as input and returns [(A+B').(A+B')]'

= (A+B')' = A'.B

Gate 3 get C' as input and returns (C'.C')' = (C')' = C

Gate 4 gets input as (A'.B) and C ((A'.B).C)' = (A'.B)' + C' = A+ B'+C'

Gate 5 gets A+ B'+C' and A+ B'+C' as input and returns (A+ B'+C')'