Question

Q. D FF is called as delay FF.​

Answer 1

Answer:

lThe major applications of D flip-flop are to introduce delay in timing circuit, as a buffer, sampling data at specific intervals. D flip-flop is simpler in terms of wiring connection compared to JK flip-flop. Here we are using NAND gates for demonstrating the D flip flop.

Answer 2

Answer:

The working of the D flip flop is similar to the D latch except that the output of the D Flip Flop takes the state of the D input at the moment of a positive edge at the clock pin (or negative edge of the clock input is active low) and delays it by one clock cycle. That's why it is commonly known as a delay flip flop.

Explanation:

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