Question

Q4 (50 points) Consider a dual-core multiprocessor with the following cache hierarchy: Both the cores have
their own private Li cache while they share their L2 level cache. The first level cache on both the cores is 2-
way set associative with cache line size of 2K bytes, and access latency of 30ns per word, while the shared
cache is direct mapped with cache line size of 4K bytes and access latency of 120ns per word. Consider a
process with two threads, with one thrend running on cach of the cores as follows (assume the size of an
integer to be 4 bytes which is same as the word size):
Theod.​

Answer 1

Answer:

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Explanation:

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