register is used to store data temporarily for computation by ALU
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Cu-11 is the name of an ASIC technology by IBM that has a drawn gate length — and hence also a minimum feature size — of 110 nm and that operates at 1.2 V. The process combines copper interconnect with low-k interlevel dielectric materials. As part of the Cu-11 design library, IBM offers an SRAM macrocell generator for memories ranging from 128 bit to 1 Mibit as well as embedded DRAM megacells of trench capacitor type with up to 16 Mibit. A 1 Mibit eDRAM has a cycle time of 15 ns which is equivalent to 555 times the nominal delay of a 2-input nand gate. eDRAM bit cell area is 0.31 μm2 which corresponds to 25.6 F2. A 1 Mibit eDRAM occupies an area of 2.09 mm2 (with an overhead factor 1.84) and its 16 Mibit counterpart 14.1 mm2 (overhead factor 1.63).
Actel's ProASICPLUS flash-based FPGA family makes embedded SRAMs available in chunks of 256×9 bit. The APA1000 part includes 88 such blocks which corresponds to 198 Kibit of embedded RAM if fully used.
Flash memories have not been addressed here as they do not qualify for short-time random-access storage. This is primarily because data must be erased in larger chunks before it becomes possible to rewrite individual words. The comparatively low speed and limited endurance are other limitations that make flash more suitable for longer-term storage applications such as retaining FPL configurations as explained in section 2.2.
Just for comparison, the physical bit cell area of flash technology is a mere 4 to 12F2 and, hence, comparable to DRAM rather than SRAM. What's more, by using four voltage levels instead of two, two bits can be stored per flash cell bringing down the minimum area to just 2F2 per bit. Endurance is on the order of 100 000 write&erase cycles for flash cells that hold one bit (two states) and of 10 000 cycles for those that hold two bits (four states). Still higher numbers are made possible by wear-leveling schemes implemented in special memory controllers.
Observation 3.8
Only registers allow for simultaneous access to all data but occupy a lot of die area per bit. SRAMs serve to temporarily hold more significant quantities of data with access times that are slower than registers but faster than DRAMs. DRAM and Flash memories are cost-efficient for large data quantities. Flash is used for permanent storage, speed is much lower than with RAMs, though. Off-chip commodity memories offer virtually unlimited capacities at low costs, but are is associated with speed, energy and other penalties.
As further details of the various memory technologies are of little importance here, the reader is referred to the literature [59] [60] [61] [62]. An excellent introduction to flash memory technology is given in [63], [64] elaborates on improvements towards high-density storage and high-speed programming, while [65] and [66] focus on the role of nand flash for mass storage and on the system and packaging aspects of removable media respectively.
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