The bus system of Fig. 8-2 has the following propagation delay times: 30 ns for the signals to propagate through the multiplexers, 80 ns to perform the ADD operation in the ALU, 20 ns delay in the destination decoder, and 10 ns to clock the data into the destination register?
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Answer:
- 8-2=6
- 20-10=10
ANS=10+6=16
Explanation:
ANS=16 NS
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