Computer Science, asked by patnaiksagar98, 4 months ago

What is meant by the noise margin of a logic gate?

a - The range of input voltages that are treated as logic 0.

b - The range of input voltages that are treated as logic 1.

c - The voltage range between the logic O and logic 1 ranges in the input

d - None of these.​

Answers

Answered by Jamsie
1

Answer:

b) The range of input voltages that are treated as logic 1.

Explanation:

In practice, noise margins are the amount of noise, that a logic circuit can withstand. Noise margins are generally defined so that positive values ensure proper operation, and negative margins result in compromised operation, or outright failure.

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