Question

, what is the Advantage & disadvantage of gated D latch?? ​

Answer 1

Explanation:

A latch is level sensitive, which means that it will put the data through only when the clock is high or the clock is low depending on whether you are using an Active high or Active low logic.

A flip flop on the other hand is edge triggered, which means that it will put the data through only on the positive edge or the negetive edge of the clock depending on active high or active low logic.