Question

Which of the following is not a Characteristics of
Reduced Instruction Set Architectures
More than one instruction per
cycle
Register-to-register
operations
Simple addressing
modes
Simple instruction
formats​

Answer 1

Answer:

More than one instruction per cycle i.e. option (a)

Explanation:

Although I think there is a typing error in the question, the option is more likely to be [More than 1 cycles per instruction].

This is not a characteristic of RISC because in these architectures CPI (Cycles per instruction) is equal to 1 because of successful pipeline.