Why static CMOS is considered to be a robust logic design?
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Optimizing a logic gate for area, speed, energy , or robustness ... A static CMOS gate is a combination of two networks, called the pull-up ...
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- Static CMOS is a logic circuit design technique whereby the output is always strongly driven due to it always being connected to either VCC or GND (except when switching). This design is in contrast to Dynamic CMOS which relies on the temporary storage of signal using various load capacitances.
- The main advantage of CMOS over NMOS and BIPOLAR technology is the much smaller power dissipation. Unlike NMOS or BIPOLAR circuits, a Complementary MOS circuit has almost no static power dissipation. Power is only dissipated in case the circuit actually switches.
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