why wired and gates is not possible in totem-pole configuration?
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1
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connection are used, then a large current from supply +V will flows to ground through high state gate transistor and low state gate transistor. Thus, large current will flow which damages the output transistors of totem pole TTL arrangement.
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2
Answer:
connection are used, then a large current from supply +V will flows to ground through high state gate transistor and low state gate transistor. Thus, large current will flow which damages the output transistors of totem pole TTL arrangement.
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