Question

write vhdl statements that represent the following circuit
write a statemtn of each gate
write one statement of whole circuit

Answer 1

Answer:

Draw the circuit represented by the following VHDL statements: T1 <= not A and not B and I0; T2 <= not A and B and I1; T3 <= A and not B and I2; T4 <= A and B and I3; F <= T1 or T2 or T3 or T4; (b) Draw a MUX that implements F. Then write a selected signal assignment statement that describes the MUX.