Question

(10 pts) Assume falling edge triggered operation for the following 3-bit register (ignore their "clear" inputs marked "CE"), and initial content 000. Draw the timing diagrams for the 3 bits (Q2Q1Qo) against 10 clock pulses, assuming that the external bit presents the 10-bit sequence 1001100100 at the falling edges of the 10 pulses. D Q D Q D 0 External Bit Q Oo. lo CE CE CE Clock​

Answer 1

I don't know the answer sorry