Question

2) Consider a situation where there are three cores (Pl. P2 and P3) using dedicated LI cache and shared main memory and use MESI protocol for cache coherence. Assume the events start with a copy of cache line p getting copied by processorl. What will be the states of p for following events? i) P2 reads p P3 writes p 11) P3 reads p iv) P2 reads p​

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