Computer Science, asked by chiragkaushal1, 4 months ago

Consider a program of 15000 instructions executed by a linear pipeline processor with a clock rate of 25 MHZ. Instruction pipeline has 5 stages and one instruction is issued per clock cycle .Calculate speed up ratio, efficiency and throughput of this pipelined processor.

Answers

Answered by Anonymous
11

Answer:

here is your answer...

please mark BRAINLIEST

Attachments:
Answered by aliyasubeer
1

Answer:

Speed up ratio= 4.999 Efficiency= 0.999 and Throughput of this pipelined processor is 24.99 MIPS

Explanation:

Data given:

Number$  of instructions n=\mathbf{1 5 , 0 0 0}$ instructions or tasks.\\clock $ frequency $ f=25 \mathrm{MHz}$.\\Number$  of stages$   in pipeline $k=5$ stages.\\For the given issued processor.

  1. The Speedup$\left(S_{k}\right)$,

       $S_{k}=\frac{T_{1}}{T_{k}}=\frac{n k \tau}{k \tau+(n-1) \tau}$    

            =\frac{n k}{k+(n-1)}$\\$=\frac{(15,000)(5)}{5+(15,000-1)}$\\$=\frac{75,000}{15,004}$$=\mathbf{4 . 9 9 9}$

      2. Throughput = H_K

       \\H_{k}=\frac{n f}{k+(n-1)} \quad\\  

             =\frac{(15,000)(25)}{5+(15,000-1)}$\\$=\frac{375,000}{15,004}$\\$=24.99$ MIPS

         3. Efficiency E_K

      E_{k}=\frac{S_{k}}{k}$$=\frac{4.999}{5}$  = 0.998 %

Similar questions