Design synchronous MOD-5 counter counting following binary sequence uding T flip flop. Sequence: 0,1,2,3,4,0,1,2,3,4,0,1,,,,,,,,,,
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Answer:
Prerequisite – Counters
Problem – Design synchronous counter for sequence: 0 → 1 → 3 → 4 → 5 → 7 → 0, using T flip-flop.
Explanation:
For given sequence, state transition diagram as following below:
State transition table logic:
Present State Next State
0 1
1 3
3 4
4 5
5 7
7 0
State transition table for given sequence:
Present State Next State
Q3 Q2 Q1 Q3(t+1) Q2(t+1) Q1(t+1)
0 0 0 0 0 1
0 0 1 0 1 1
0 1 1 1 0 0
1 0 0 1 0 1
1 0 1 1 1 1
1 1 1 0 0 0
T flip-flop – If value of Q changes either from 0 to 1 or from 1 to 0 then input for T flip-flop is 1 else input value is 0.
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