Question

Embedded processors are based on what architecture?

Answer 1

The SH-5 is a 64-bit embedded architecture developed and licensed by SuperH, Inc. The SH-5 is a general purpose architecture with broad support for multimedia software through its SIMD instructions. A rich set of CPU-related debug features has been designed to support debug of the SH-5 CPU inside an SoC product.

An integrated bus analyzer monitors transactions on externally connected IP blocks and the SuperHyway (an on-chip interconnect fabric designed for high performance SoC designs). This gives developers much better visibility of the behaviour of their SoC. A debug module (SHdebug) provides external interfaces through which the SuperHyway can be extended off-chip, supporting both off-chip control and monitoring of IP blocks as well as allowing the SH-5 to execute debug support code with no intrusion into the debugged software's memory footprint.

This paper provides a description of the SH-5 debug architecture, compares it with some other SoC (System-on-Chip) debug approaches and gives examples of how it can be applied to debug particular scenarios.