Art, asked by RUDEGIRL, 1 year ago

Flip-flops are the sequential logic circuits which unlike the combinational circuits have the capability to store their previous state. Due to their storage ability, these flip-flops are used as the basic building blocks in the design of memory elements such as registers. To work as a memory unit, multiple flip-flops are connected together in a specific arrangement. Two of the most common flip-flop arrangements are Master-Slave Flip-flop Pairs and Pulse-Triggered Flip-flops.

If you want to design the memory unit for an embedded microprocessor, which of the two flip-flop arrangements would you chose in this situation to ensure high performance?

Give your opinion as brief and precise as possible.

Answers

Answered by Anonymous
0

Pulse-triggered flip-flops are widely used in microprocessors in recent years due to their high performance. JK flip flops are more powerful than D-flip flops. on the other hand, the design of pulse-triggered JK-flip flops is rarely mentioned. In general, JK flip flops are designed on the basis of D-flip flops, and have more power utilization and greater lag than Flip-flops. An plain pulsating double-needle triggered JK flip-flop (ep-it JKFF) is proposed, which is designed directly based on the uniqueness of JK-flip-flops and pulse-triggered flip-flops directly. Imitation using Hospice and a 0.18-inch technology shows that the future pulsed JK-flip Flopped has low power distribution to Settings to make active Windows.

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