Question

Let us consider a hypothetical computer that has an intruction that computer sum of

Answer 1

Organization of Computer Systems: 
§ 2: ISA, Machine Language, and Number Systems

Instructor: M.S. Schmalz

Reading Assignments and Exercises

This section is organized as follows:

2.1. ISA and Machine Language 
2.2. Instruction Representation 
2.3. Decision Instructions and Procedure Support 
2.4. Number Representations, Data Types and Addressing 
2.5. MIPS Programs 
2.6. Pointers and Arrays

Information contained herein was compiled from a variety of text- and Web-based sources, is intended as a teaching aid only (to be used in conjunction with the required text, and is not to be used for any commercial purpose. Particular thanks is given to Dr. Enrique Mafla for his permission to use selected illustrations from his course notes in these Web pages.

Reading Assignments and Exercises

2.1. ISA and Machine Language

Reading Assignments and Exercises

The instruction set architecture (ISA) is a protocol that defines how a computing machine appears to a machine language programmer or compiler. The ISA describes the (1) memory model, (2) instruction format, types and modes, and (3) operand registers, types, and data addressing. Instruction types include arithmetic, logical, data transfer, and flow control. Instruction modes include kerneland user instructions.

ISAs are specified in formal definition documents, for example, for the V9 SPARC machine and Java Virtual Machine.

2.1.1. Hierarchical View

As discussed previously, computing languages are translated from source code to assembly language to machine language, as illustrated notionally in Figure 2.1.



Figure 2.1. Example of computing language translation, adapted from [Maf01]

The implementation of the ISA in hardware is couched in terms of the fetch-decode-execute cycle illustrated in Figure 2.2. In the fetchstep, operands are retrieved from memory. The decode step puts the operands into a format that the ALU can manipulate. The execute cycle performs the selected operation within the ALU. Control facilitates orderly routing of data, including I/O to the ALU's external environment (e.g., peripheral devices such as disk or keyboard).



Figure 2.2. Basic ISA cycle, where fetch gets operands from memory, decode translates the operands into a format the ALU can accept, and execute performs an ALU operation on the decoded operands - adapted from [Maf01]

2.1.2. Machine Language

Machne language instructions are of four types: Arithmetic, Logical, Data transfer, and Branches (also called flow control), as follows:

Arithmetic: add (addition), sub (subtraction), mult (multiplication), div (division)

Logical: and, or, srl (shift right logical), ssl(shift left logical)

Data Transfer: lw (load word), sw (store word), lui (load upper immediate)

Branches:

Conditional: beq (branch on equal), bne(branch on not-equal), slt (set on less-than),

Unconditional: j (jump), jr (jump register), jal (jump-and-link)

The MIPS instruction format uses the KISS principle (keep it simple and stupid). As we say more formally:

Design Principle #1: Simplicity favors regularity.

This means that the MIPS instruction format is the same for all instructions. Each instruction begins with an opcode that tells the machine what to do, followed by one to three operand symbols.



Figure 2.3. MIPS instruction - simple addition example, adapted from [Maf01]. These instructions are symbolic examples of what MIPS actually understands