Q1. In SPICE, a sequence of nonlinear operating points calculated while sweeping an input voltage or current, or a circuit parameter is termed as?
1. DC Analysis
2. AC Analysis
3. DC Transfer Curve Analysis
4. Noise Analysis
Q2. In a SPICE netlist statement .dc V2 0 1.8 .01 what does .01 signifies?
1. Applied DC bias
2. Applied AC bias
3. Increment in DC bias
4. Increment in AC bias
Q3. For a static design, which of the following statement is true?
1. The gate output is connected to either power or ground
2. The gate output is connected to both power and ground
3. The gate output is connected to power only
4. The gate output is connected to ground only
Q4. For a NMOS (threshold voltage = Vtn) based pass transistor based AND logic, when both the gates are on, then for an input equal to 1 (equivalent to VDD) , the output is
1. VDD - Vtn
2. 2(VDD – Vtn)
3. VDD + 2Vtn
4. VDD - 2Vtn
Q5. For a NAND-2 logic, if the widths of the pull down NMOS transistors are doubled, then assuming no change in the load capacitance, the high-to-low propagation delay (tpHL) for input vector (1,1) is
1. Unchanged
2.Reduced by two
3. Increased by two
4. Reduced by eight
sneharajput3011:
Can you tell me the answer for above questions?
Increment in DC bias
Accepted Answers:
DC Transfer Curve Analysis
Accepted Answers:
The gate output is connected to either power or ground
Accepted Answers:
VDD - 2Vtn
Accepted Answers:
Reduced by two
Answers
Answered by
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noise analysis
applied ac bias
the gate output is connected either power or ground
vdd+2vtn
reduced by eight
applied ac bias
the gate output is connected either power or ground
vdd+2vtn
reduced by eight
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