write benifits of pipeline with example
Answers
HEY MATE , THE BENIFITS OF PIPELINE ARE ,
1. THEY ARE ECONOMICAL IN THE TRANSPORT OF OIL , GASES OVER LONG DISTANCES.
2. THE SOLIDS CAN BE TRANSPORTED IN THE FORM OF SLURRY.
3. THEY CONNECT VERY DISTANT PLACES WHICH ARE NOT IN REACH WITH CAR OR TRAIN.
EXAMPLES OF PIPELINES ARE , HVJ PIPELINE.
THANKS .
PLZ MARK AS BRAINLIEST
Answer:
IF: Fetches the instruction into the instruction register.
ID: Instruction Decode, decodes the instruction for the opcode.
AG: Address Generator, generates the address.
DF: Data Fetch, fetches the operands into the data register.
EX: Execution, executes the specified operation.
WB: Write back, writes back the result to the register.
Explanation:
Generic pipeline
Bubble
A typical instruction to add two numbers might be ADD A, B, C, which adds the values found in memory locations A and B, and then puts the result in memory location C. In a pipelined processor the pipeline controller would break this into a series of tasks similar to:
LOAD A, R1
LOAD B, R2
ADD R1, R2, R3
STORE R3, C
LOAD next instruction
The locations 'R1' and 'R2' are registers in the CPU. The values stored in memory locations labeled 'A' and 'B' are loaded (copied) into these registers, then added, and the result is stored in a memory location labeled 'C'.
In this example the pipeline is three stages long- load, execute, and store. Each of the steps are called pipeline stages.
On a non-pipelined processor, only one stage can be working at a time so the entire instruction has to complete before the next instruction can begin. On a pipelined processor, all of the stages can be working at once on different instructions. So when this instruction is at the execute stage, a second instruction will be at the decode stage and a 3rd instruction will be at the fetch stage