Explain input output configration in computer architecture
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Input/Output Configuration Program (IOCP) is a program for IBM mainframes that compiles a description of the Channel Subsystem and LPAR configuration, optionally loading it into an Input/Output Configuration Data Set (IOCDS); it recognizes the syntax of MVS Configuration Program (MVSCP) input, and there is no need to ...
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It depends on the context you use the word “registers”.
There are registers set aside for computation (there may be between one and several hundred, but usually between 16 and 32).
Then there are control registers for the CPU (status, processor state, condition of FPU, integer arithmetic units), interrupt control registers (anywhere from one to several hundred of those, though usually less than 20).
Then there are memory management registers… cache control registers, the cache itself has flags/control information for each entry in the cache…
There are bus control registers (defining clock rates, interrupt routing control, priorities…)
hope helps ☺️☺️☺️
There are registers set aside for computation (there may be between one and several hundred, but usually between 16 and 32).
Then there are control registers for the CPU (status, processor state, condition of FPU, integer arithmetic units), interrupt control registers (anywhere from one to several hundred of those, though usually less than 20).
Then there are memory management registers… cache control registers, the cache itself has flags/control information for each entry in the cache…
There are bus control registers (defining clock rates, interrupt routing control, priorities…)
hope helps ☺️☺️☺️
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